The present invention relates to MOSFET devices, Even more particularly, the present invention relates to MOSFET devices with raised (or elevated) source/drain extensions
In the prior art, MOSFETS wit raised source/drain regions use source/drain extensions to connect a channel with the raised source/drain regions. FIG. 1 is a schematic view of a prior art MOSFET 10 with raised source/drain regions 11. The raised source/drain regions 11 are built on top of a substrate 12 surface. A gate oxide 14 is placed on the surface of the substrate 12 between the raised source/drain regions 11. A gate 15 is placed over the gate oxide 14. Side spacers 16 are placed adjacent to the gate 15 and gate oxide 14 and on the substrate 12, separating the gate 15 and gate oxide 14 from the source/drain regions 11. Source/drain extensions 17 are formed at and below the surface of the substrate 12 extending under the source/drain regions 11, the side spacers 16, and partly under the gate oxide 14 and the gate 15. Isolation trenches 19 are cut into the surface of the substrate 12 around the source/drain extensions 17 to isolate the MOSFET 10. The source/drain extensions 17 may be created through various processes with various doping concentrations. Throughout the specification and claims the phrase xe2x80x9csource/drain extensionsxe2x80x9d will also include source/drain extension type structures created through various means such as lightly-doped-drain (LDD) implants.
Deep source/drain junctions increase short-channel effects. An increased short-channel effect causes an increased off stage leakage current. Elevated or raised source/drain MOS transistors have been developed to achieve shallow junctions while maintaining low sheet resistivity in the source/drain regions, as well as low silicided contact resistance without significantly increasing the junction leakage. Such raised source/drains are discussed in xe2x80x9cElevated Source/Drain MOSFET,xe2x80x9d by S. S. Wong, et al. in IEDM Tech. Digest, December 1984, p. 634, and in xe2x80x9cRaised Source/Drain MOSFET With Dual Sidewall Spacers,xe2x80x9d by Mark Rodder and D. Yeakley, IEEE Electron Device Letters, Vol, 12(3), March 1991, p. 89, and in xe2x80x9cLow Resistance Ti or Co Salicided Raised Source/Drain Transistors For Sub-0.13 xcexcm CMOS Technologies,xe2x80x9d by C. P. Chao, et al., IEDM Tech. Digest., December 1997. Source/drain junctions have been elevated, however, only in the heavily doped regions. In other words, the junction depths of source/drain extensions have not been reduced in the related art.
Accordingly, the present invention comprises a MOSFET having partially raised source/drain extensions. Advantages of the present invention are reducing short channel effects, providing a MOSFET with shallower source/drain extensions, and providing raised source/drain extensions. Other features of the present invention are disclosed or apparent in the section entitled: xe2x80x9cDETAILED DESCRIPTION OF THE INVENTION.xe2x80x9d